Arsenic ions are implanted into silicon at an incident energy of 3 or 5 MeV to a dose of 1 × 10¹⁶ cm⁻². Buried conductive layers are formed in the Si substrate after annealing at 1050 °C for 20s. Infrared (IR) reflection spectra in the wave number range of 500 to 4000 cm⁻¹ are measured and interference fringes related to the optical response of free‐carrier plasma effects are observed. By detailed theoretical analysis and computer simulation of the IR reflection spectra, the depth profile of the carrier concentration, the carrier mobility near maximum carrier concentration, and the carrier activation efficiency are obtained. The physical interpretation of the results is given.

Yuehui Yu;Zhuyin Zhou;Guoqin Zhao;世昌 邹

Physica Status Solidi (A) Applied Research

1994-7-16

We propose a fabrication-tolerant SOI polarization splitter-rotator with cascaded MMI couplers and an assisted bi-level taper. The performance remains very stable even for a large deviation of f50 nm in terms of device sizes.

Jing Wang;Ben Niu;Haiyang Huang;You Li;Ming Li;Zhen Sheng;爱民 武;Wei Li;Xi Wang;世昌 邹;Minghao Qi;甫烷 甘

2014-11

Formation of superhard materials carbon nitride CN_x by using ion-beam synthesis method is reported. 100-keV high-dose N⁺ ions were implanted into carbon thin films at different temperatures. The samples were evaluated by X-ray photoelectron spectroscopy (XPS), Fourier transformation-infrared absorption spectroscopy (FTIR), Raman spectroscopy, cross-sectional transmission electron microscopy (XTEM), Rutherford backscattering spectroscopy (RBS), X-ray diffraction analysis (XRD) and Vickers microhardness measurement. The results show that the buried carbon nitride CN_x layer has been successfully formed by using 100-keV high-dose N⁺ ions implantation into carbon thin film. Implantation of reactive ions into silicon (IRIS) computer program has been used to simulate the formation of the buried β-C₃N₄ layer as N⁺ ions are implanted into carbon. A good agreement between experimental measurements and IRIS simulation is found.

Huoping Xin;Chenglu Lin;Huaping Xu;世昌 邹;小红 史;兴龙 吴;Hong Zhu;P. L.F. Hemment

Science in China, Series E: Technological Sciences

1996

In this paper, a 1.35 V 16 Mb twin-bit-cell virtual ground architecture embedded Flash memory is presented. To reduce the sensing margin loss caused by the side-leakage current in the virtual ground architecture memory array, a sensing current protection technique has been proposed. A reference voltage generating circuit for dynamic sensing window tracking is designed to maximize the sensing window under various PVT (Process-Voltage-Temperature) conditions. With the reference voltage generating circuit and a high performance sense amplifier, high speed read operation is achieved. As four bitlines have to be selected to read one bit, an S-D-P-P (Source-Drain-Protection-Protection) style column decoding methodology has been introduced to support the sensing current protection technique. The embedded Flash IP has been fabricated in a GSMC 90 nm 4 poly 4 metal CMOS process. The die size of the proposed Flash IP is 3.2 mm² and the memory cell size is 0.16 μm². Access time of 36 ns at 1.35 V has been achieved.

Shengbo Zhang;Jun Xiao;Guangjun Yang;Jian Hu;Mingyong Huang;世昌 邹

IEEE Transactions on Circuits and Systems I: Regular Papers

2014-10-1

A series of polyimide films irradiated by 170 keV N⁺ and 120 keV B⁺ with controlled and related implantation conditions were investigated with respect to their microstructures in modified layers, as well as their application prospects as temperature sensors. The sensitivities and sensitive ranges of these functional materials were correlated with the implantation conditions in terms of the Raman spectroscopic results. This well-defined relationship was interpreted with perspectives of ion beam microstructural modification, which provides a deeper insight into the fundamental aspects for the synthesis of temperature-sensitive materials out of polyimide precursor. It seems that greater irradiation dose, stronger beam current density, and higher target temperature constitute a set of favorable conditions for the fabrication of temperature sensors with a comparatively broad sensitive scope.

Dong Xu;Xinglong Xu;世昌 邹

Review of Scientific Instruments

1992

This Letter proposes a low-cost, single event double-upset tolerant latch which utilises interlocked nodes to keep data, clock gating (CG) in Muller C-element (MCE) to turn off the storage cell, a three-input MCE to block the soft error from the storage cell and a weak keeper to prevent high impedance state. The storage cell in the proposed latch has better reliability than the conventional triple path dual-interlocked storage cell (TPDICE). Most up-to-date single event double-upset (SEDU) tolerant latches are carried out with too large cost penalties. The proposed one saves up to 93.32% area-power-delay product (APDP) compared with one up-to-date SEDU tolerant latch and even saves 36.36% APDP compared with only single event upset (SEU) tolerant latch in the referential. Simulation results have verified SEU and SEDU tolerance of the proposed latch.

Jianwei Jiang;Yiran Xu;Jiangchuan Ren;Wenyi Zhu;Dianpeng Lin;Jun Xiao;Weiran Kong;世昌 邹

Electronics Letters

2018-5-3

The effects of Ar ion implantation on the superconductivity in epitaxial YBa₂Cu₃O_1-x thin films have been studied using X-ray diffraction, SEM, Raman scattering middle infrared reflection, and electrical measurements. It was found that both the critical current density J_c and the superconducting transition temperature T_c significantly decrease with the fluence. The sample went through the metal to semiconductor to insulator transition with increasing fluence. X-ray diffraction spectra revealed that the destruction of the superconductivity is accompanied by the orthorhombic to tetragonal phase transition. The infrared reflection spectra showed that the Ar ion implanted sample has a strong band near 550 cm^-1. The analyses of the data suggest that ion implantation induced changes of superconducting properties in YBa₂Cu₃O_7-x thin films are mainly related to the defects along the grain boundaries and the disordering of O(1) atoms. The experimental results show the possibility of fabricating Josephson junctions and other relevant devices from YBa₂Cu₃O_7-x thin films by the ion implantation technique.

Yijie Li;Congxin Ren;Guoliang Chen;建敏 陈;世昌 邹

Vacuum

1991

The tolerance of partially depleted (PD) silicon-on-insulator nMOSFETs to total-ionizing-dose-induced trapped charge in the buried oxide is investigated. The radiation-induced coupling effect due to the metamorphosis of PD device into a fully depleted one is observed. The coupling effect is responsible for the negative threshold voltage shift, enhanced drain-induced barrier lowering effect, subthreshold slope increase, and transconductance variation in the front channel device. The back channel implantation is introduced as an effective way to suppress the radiation-induced coupling effect.

Chao Peng;Zhiyuan Hu;Bingxu Ning;Huixiang Huang;正选 张;Dawei Bi;Yunfei En;世昌 邹

IEEE Electron Device Letters

2014-5

The effects of total ionizing on a 180-nm CMOS technology are comprehensively studied. Firstly, we show new results on the hump effect which has strong relationship to the STI corner oxide thickness. Secondly, the leakage current degradation in various devices after radiation is investigated. For the intra-device leakage, both body doping concentration and STI corner thickness play very important roles. For the inter-device leakage, due to the low electric field at the STI bottom, it is found to be insensitive to ionizing radiation. Thirdly, a method for extracting the effective threshold voltage of the sidewall parasitic transistor is proposed by studying the leakage output characteristics. Finally, we find that the drain saturation current increases in NMOS transistors after radiation, especially in the narrow-channel ones.

Zhiyuan Hu;Zhangli Liu;Hua Shao;正选 张;Bingxu Ning;敏 陈;Dawei Bi;世昌 邹

IEEE Transactions on Nuclear Science

2011-6

A reverse substrate bias is known to increase the threshold voltage and reduce the off-state leakage current, which is of great interest from a radiation perspective in space applications. In this work, substrate biases during both irradiation and post-irradiation test on the impacts of total ionizing dose effects in a 180 nm CMOS technology are studied. The results indicate that a negative substrate bias during irradiation impairs the radiation hardness while a negative substrate bias during post-irradiation test improves the radiation hardness for nMOS transistors. A simple model is proposed to discuss the net result including the both effects. We find that the substrate bias for radiation hardening does not always work in some special conditions, such as the device with very low body doping and the STI which is very sensitive to the electric field for the buildup of charge.

Zhiyuan Hu;Zhangli Liu;Hua Shao;正选 张;Bingxu Ning;敏 陈;Dawei Bi;世昌 邹

IEEE Transactions on Nuclear Science

2011-6